LFSR Based Watermark and Address Generator for Digital Image Watermarking SRAM
||International Journal of Computer & Organization Trends (IJCOT)||
|© 2012 by IJCOT Journal|
|Year of Publication : 2012|
|Authors : S. Bhargav Kumar, S.Jagadeesh, Dr.M.Ashok|
- S. Bhargav Kumar, S.Jagadeesh, Dr.M.Ashok "LFSR Based Watermark and Address Generator for Digital Image Watermarking SRAM" . International Journal of Computer & organization Trends (IJCOT), V2(3):17-23 May - Jun 2012, ISSN 2249-2593, www.ijcotjournal.org. Published by Seventh Sense Research Group.
In digital image watermarking authentication methods and techniques, the original image will be watermarked with a text, image, audio or any signature. To overcome the uneven and enormous distribution of multimedia content in the internet, we propose a new method of watermarking technique using pseudo random number generator LFSR (Linear Feedback Shift Register). Two LFSR based implementations of pseudo random number generator are designed for embedding and generating an address in image watermarking applications are presented. The first LFSR is axa size bit array watermark generator, which will be embedded in the bxb size bit array original image. After embedding, the watermarked bit array image will be stored in the image watermarking SRAM (Static Random Access Memory) memory location using a cxc size bit array memory address location which will be generated by the second LFSR. In our paper we used LFSR, to generate a unique random number watermark array for the original image. The embedded watermarked image will contain the combinations of LFSR axa size array bit stream in such a way that, if this bit stream doesn’t match with the LFSR used at the watermark extraction process, the watermark won’t be revealed, providing a secured authentication to the original image. In watermark extraction process, we used the same LFSR of axa size bit array and extracted the watermark bit stream. Our proposed method of watermarking is simulated and synthesized using Active-HDL Version 7.2SE design tools and ModelSim XE III 6.4b. Our proposed method showed better results compared to other conventional methods of digital image watermarking.
 R.Sundararaman and Dr. Har Narayan Upadhyay, Stego System on Chip with LFSR based Information Hiding Approach, International Journal of Computer Applications (0975 – 8887), Volume 18– No.2, March 2011, pp.24-31.
 W.A.S Wijesinghe, M.K Jayananda and D.U.J Sonnadara, Hardware Implementation of Random Number Generators, Proceedings of the Technical Sessions, 22 (2006) 28-38, Institute of Physics – Sri Lanka, pp.28-38.
 Nebu John Mathai, Student Member, IEEE, Deepa Kundur, Member, IEEE, and Ali Sheikholeslami, Member, IEEE, “Hardware Implementation Perspectives of Digital Video Watermarking Algorithms,” IEEE Transactions On Signal Processing, Vol. 51, No. 4, , pp. 925–938, April 2003.
 B. Rajan and S.Ravi, “FPGA Based Hardware Implementation of Image Filter With Dynamic Reconfigurable Architecture,” in IJCSNS International Journal of Computer Science and Network Security, VOL.6 No.12, December 2006, p. 121-127.
 Deepthi P.P. and P.S. Sathidevi, “Hardware Stream Cipher Based on LFSR and Modular Division Circuit,” International Journal of Electrical and Computer Engineering 3:12 2008, pp.791-799.
 Saraju P. Mohanty, Renuka Kumara C, and Sridhara Nayak, “FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder,” CIT 2004, LNCS 3356, pp. 344–353, 2004.
 Xiangxue Li, Dong Zheng, and Kefei Chen, “LFSR-Based Signatures with Message Recovery,” International Journal of Network Security, Vol.4, No.3, pp.266–270, May 2007.
digital image watermarking, authentication, revealed, pseudo random number generator, LFSR, image watermarking SRAM, bit array, address generator, FPGA, bit stream, watermark extraction, Active-HDL, ModelSim.