Implementation of ATM Packets Over MPLS Network on FPGA

Implementation of ATM Packets Over MPLS Network on FPGA

  IJCOT-book-cover
 		 International Journal of Computer & Organization Trends  (IJCOT)          
 
© 2013 by IJCOT Journal
Volume-3 Issue-3                          
Year of Publication : 2013
Authors :  Satish M B, Savitha C, Dr. M Z Kurian 

Citation

- Satish M B, Savitha C, Dr. M Z Kurian   "Implementation of ATM Packets Over MPLS Network on FPGA" . International Journal of Computer & organization Trends  (IJCOT),V3(3):9-12 May - Jun 2013, ISSN:2249-2593, www.ijcotjournal.org. Published by Seventh Sense Research Group.

Abstract

MPLS is high lightened as the most promising technology for the ATM backbone network. This MPLS improves in reducing the traffic in the network and increases the bandwidth. ATM switch network for the fast Internet services which makes use of virtual network for switching between routers by adding a layer 3 routing module to the existing ATM network and can provide scalable Internet services to users with various service levels. This paper presents an implementation of MPLS for an ATM network on FPGA which replaces the virtual circuits by use of labels in the network.

References

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Keywords

MPLS, Asynchronous Transfer Mode, Ingress packet processing module, Egress packet processing module.